Computer systems typically utilize parallel power supply systems. A parallel power supply system generally comprises a plurality of power sources such as DC-DC converters or voltage regulators connected in parallel to provide current to a load comprising one or more processors, memory devices, disk drives, etc.
Existing parallel power supplies employing PWM topologies allow “burst mode” which terminates switching on a properly functioning regulator macro in the presence of an over-voltage caused by a parallel regulator macro. This lack of switching is detectable and allows logic gates to discern which macro is the offending over-voltage producer (i.e., is actively switching), and correctly disable it. One example of such a circuit is described in U.S. Pat. No. 6,278,597 entitled “Conditional Over-Voltage Protection for Redundant Phase-Shift Converters.”
Parallel voltage regulator modules (VRMs) are a new power system topology. Existing VRM parallel topologies do not protect well and typically only terminate switching activity on a faulty phase. However, if the over-voltage condition is due to a shorted high-side switch in a non-insolated topology (as opposed to a control loop or reference fault), then simply terminating switching activity does not remove the over-voltage fault, which compromises the redundant purpose.
Certain existing VRM parallel topologies make use of the well-defined “Intel Load Line” that droops more than 5 percent of nominal voltage at full load. By coordinating a sliding over-voltage threshold with load current, a VRM macro supporting load current would have a lower trigger threshold for an over-voltage trip and therefore be the first VRM of the parallel group to trip. VRMs not providing load (properly functioning in the presence of a over-voltage caused by a parallel macro) would have a higher trigger threshold and thus protect properly. This solution lacks two properties, however. First, light load conditions make the over-voltage thresholds identical for good and bad parallel VRMs, and secondly, for load line droop of certain technology, which can be 10× less than that of Intel requirements, the over-voltage trigger threshold is only fractions of a percent different between faulty VRMs and properly functioning VRMs, even at substantial load conditions.
Accordingly, a parallel power supply protection circuit is needed which can accurately isolate a particular voltage regulator module that is causing an over-voltage condition without causing a shut down of the entire parallel power system. The present invention meets this need.